> Senior EDA / ASIC CAD Engineer

Das ist der Job

Contact: Send us a mail with your CV incl. your certificates, transcripts etc. attached tojobs@racyics.com .

Darum lohnt es sich

Our team of more than 150 employees covers the complete chip design process up to system architecture development. Racyics is working for major German and international semi-custom companies both as a service provider and in collaborative partnerships.

Working at Racyics comes with many benefits, including flexible working hours, mobile work, a financial contribution to your childcare costs and great team events. Job Offer: Senior EDA / ASIC CAD Engineer Racyicsis looking for an experiencedSenior EDA / ASIC CAD Engineertobuild and scale our EDA and CAD design environment.

Racyicsprovidesa comprehensiveproject and design flow management environmentfor itsemplyoeesand external customers.This role offers the opportunity toimprove and scale the existing environment and toestablishrobust, automated, and scalable design flowssupporting analog, digital, and mixed-signal IC development, with a direct impact on productivity, quality, and time-to-market.

You will work hands-on witha wide range ofstate-of-the artEDAtoolsside-by-side with experiencedengineersscripts, and flows, while acting as thetechnical expertof design automationatRacyics.

Job Description: • Improve,developandmaintainEDAandCAD tools, scripts, and design flowsfor ASIC andIPdevelopment • Buildend-to-end design flowscoveringall major Semi- and Full-Custom Design steps • Implementautomation frameworksusing Python,Perl,Cadence SKILL,Tcl,and Linux shell scripting • Enable and maintainPDKs • Support designers withtooland flowusage, debugging, and PPA optimization • Introduceflow standardization, documentation, and best practicesas the organization grows Requirements: • Hands-onexperienceinvarious commercialEDAtools fromSynopsys,Cadenceand Siemens EDA • Strong programming skills inPython,SKILL,Shell,Tcl,andPerl) • SolidLinux/Unix shell scriptingexperience • Strong understanding ofdigitalASIC design flows(synthesis,STA,Place-and-Routeand Physical Signoff) • Hands-on experience withEDA tools(e.g.Cadence Virtuoso) • Experience withLVS, DRC, PEX, and sign-off methodologies • Version control experience (Git, SVN) • Knowledge of LSF/SLURM, License Monitoring and LDAPisa plus • Strong problem-solving skills and ability to work independently Location: Employment Type: Full-time (up to 40 hours per week) About us: Racyics® is Europe’s leading design service provider for mixed-signal system-on-chip design and turnkey services in advanced nodes.

We deliver professional analog, digital and mixed-signal design services tailored to the customers’ needs with focus on realization of complex System-on-Chips in leading edge technology nodes. Please mind that we can only consider attachments in PDF format.